1. Technical Field
A method of manufacturing semiconductor devices is disclosed, wherein a process of simultaneously forming a high voltage device and a low voltage device is carried out. More specifically, a photoresist film for patterning a gate oxide film in a high voltage device is removed in a wet mode using a solvent and the polysilicon film used as the gate electrode is formed without applying vacuum, whereby reliability of the gate oxide film is increased, damage of the gate oxide film due to ozone plasma is prevented and penetration of a grain protrusion of the polysilicon film into the gate oxide film is prevented, thus improving the breakdown voltage characteristic of the gate oxide film.
2. Background of the Related Art
In semiconductor devices in which a high voltage device operating at a high voltage and a low voltage device operating at a low voltage are simultaneously fabricated, the gate oxide film in the high voltage device is made thicker than the gate oxide film in the low voltage device to improve the breakdown voltage characteristic against the high voltage.
This method of manufacturing the semiconductor devices includes the steps of thickly forming a first gate oxide film on a semiconductor substrate, removing the first gate oxide film in a low voltage device region using a photoresist film pattern, removing the photoresist film pattern using ozone plasma, and then thinly forming a second gate oxide film in the low voltage region. Next, a polysilicon film for forming the gate electrode is formed. At this time, the polysilicon film is formed by applying vacuum several times while the polysilicon film is formed to have a given thickness. For example, in the process of forming the polysilicon film of a 2000 xc3x85 thickness, fair vacuums are applied. At this time, vacuum is applied once every time the polysilicon film reaches a thickness of 500 xc3x85.
However, in the process of removing the photoresist film using ozone plasma, the photoresist film is not completely removed and remnants remain. This degrades reliability of the gate oxide film and the plasma also damages the gate oxide film.
Further, while the method of forming the polysilicon film by applying vacuum four times is good for dopant channeling prevention, as the grain protrusion of the polysilicon film penetrates into the gate oxide film, however, an interfacial roughness between the gate oxide film and polysilicon increases, thereby increasing the leakage current at a pre-tunneling region. This phenomenon is shown in FIG. 1. FIG. 1 is a graph illustrating current distribution depending on the gate voltage in the case where the polysilicon film of the gate electrode is formed by applying vacuum four times as described above. FIG. 1 illustrates the results of measuring about 25 dies. It could be said that the current is increased at the pre-tunneling region where the grain protrusion of polysilicon penetrates into the gate oxide film. Further, if the polysilicon film is formed by the above method, the process time is increased because of the multiple vacuum treatments required.
Accordingly, to substantially obviate one or more problems described above, a method of manufacturing semiconductor devices is disclosed by which a photoresist film remnant does not remain after the removal process of the photoresist film, thereby improving reliability of a gate oxide film.
The disclosed method can also prevent a reduction in the breakdown voltage characteristic due to grain protrusion of polysilicon.
A preferred method comprises: forming an isolating film at a given region of a semiconductor substrate to define a first region and a second region; forming a first oxide film on the entire structure and then removing the first oxide film in the second region using a photoresist film pattern; removing the photoresist film pattern using a solvent, implementing an oxidization process to form a second oxide film on the semiconductor substrate in the second region; forming a polysilicon film on the entire structure and then patterning the polysilicon film to form gate electrodes in the first and second regions, respectively; and implementing an impurity ion implantation process to form junction regions at given regions on the semiconductor substrate.
Additional advantages and features of the disclosed method will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice. Other advantages of the disclosed method may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.